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74LV107 - Dual JK flip-flop

74LV107 Description

INTEGRATED CIRCUITS 74LV107 Dual JK flip-flop with reset; negative-edge trigger Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbo.
The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107.

74LV107 Features

* Wide operating: 1.0 to 5.5 V

74LV107 Applications

* 1.0 to 3.6 V
* Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
* Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,
* Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V,
* Output capability: standard
* ICC category: flip-flops QUI

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