74LV109 Datasheet - Philips

Dual JK flip-flop

74LV109 Features

* Optimized for low voltage applications: 1.0 to 3.6 V

* Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

* Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,

* Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V,

* Output capabilit

74LV109 General Description

The 74LV109 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109. The 74LV109 is a dual positive-edge triggered JK-type flip-flop featuring individual J, K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs; also complementary Q and Q outputs. The set and .

74LV109 Datasheet (124.89 KB)

74LV109 Datasheet Preview — Preview of 74LV109 PDF

Datasheet Details

Part number:

74LV109

Manufacturer:

Philips

File Size:

124.89 KB

Description:

Dual jk flip-flop.
INTEGRATED CIRCUITS 74LV109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1997 Jun 06 IC24 Dat.

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74LV109 Dual flip-flop Philips

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74LV109 Features

74LV109 General Description

Datasheet Details

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