74LV11
74LV11 is Triple 3-input AND gate manufactured by Philips Semiconductors.
FEATURES
- Optimized for Low Voltage applications: 1.0 to 3.6 V
- Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
- Typical VOLP (output ground bounce) t 0.8 V at VCC = 3.3 V,
- Typical VOHV (output VOH undershoot) u 2 V at VCC = 3.3 V,
- Output capability: standard
- ICC category: SSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf v2.5 ns SYMBOL t PHL/t PLH CI CPD PARAMETER Propagation delay n A, n B, n C to n Y Input capacitance Power dissipation capacitance per gate Tamb = 25°C Tamb = 25°C
DESCRIPTION
The 74LV11 is a low-voltage Si-gate CMOS device and is pin and function patible with 74HC/HCT11. The 74LV11 provides the 3-input AND function.
CONDITIONS CL = 15 p F; VCC = 3.3 V See Notes 1 and 2
TYPICAL 10 3.5 18
UNIT ns p F p F
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) fo) where: PD = CPD × VCC2 × fi )ȍ (CL × VCC2 fi = input frequency in MHz; CL = output load capacitance in p F; fo = output frequency in MHz; VCC = supply voltage in V; ȍ (CL VCC2 fo) = sum of the outputs. 2. The condition is VI = GND to VCC.
ORDERING INFORMATION
PACKAGES 14-Pin Plastic DIL 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE
- 40°C to +125°C
- 40°C to +125°C
- 40°C to +125°C
- 40°C to +125°C OUTSIDE NORTH AMERICA 74LV11 N 74LV11 D 74LV11 DB 74LV11 PW NORTH AMERICA 74LV11 N 74LV11 D 74LV11 DB 74LV11PW DH PKG. DWG. # SOT27-1 SOT108-1 SOT337-1 SOT402-1
PIN DESCRIPTION
PIN NUMBER 1, 3, 9 2, 4, 10 7 12, 6, 8 13, 5, 11 14 SYMBOL 1A
- 3A 1B
- 3B GND 1Y
- 3Y 1C
- 3C VCC NAME AND FUNCTION Data inputs Data inputs Ground (0 V) Data outputs Data inputs Positive supply voltage
FUNCTION TABLE
INPUTS n A L L L L n B L L H H n C L H L H OUTPUT n Y L L L L
H H H H NOTES: H = HIGH voltage level L = LOW voltage level
1998 Apr 20
853- 1894 19256
Philips Semiconductors
Product specification
Triple 3-input AND gate
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