74LV10 Datasheet - Philips

74LV10 Triple 3-input NAND gate

The 74LV10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10. The 74LV10 provides the 3-input NAND function. CONDITIONS CL = 15 pF; VCC = 3.3 V See Notes 1 and 2 TYPICAL 9 3.5 12 UNIT ns pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation .

74LV10 Features

* Optimized for Low Voltage applications: 1.0 to 3.6 V

* Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

* Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,

* Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V,

* Output capabilit

74LV10_PhilipsSemiconductors.pdf