LVDS Interface ICs
35bit LVDS Receiver
LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and
number of bits range is from 35 to 70. Data is transmitted seven times (7X) stream and reduce cable number
by 3(1/3) or less. The ROHM's LVDS has low swing mode to be able to expect further low EMI.
■Five channels of LVDS data stream are converted to 35bits data of parallel LVCMOS level outputs.
■30bits of RGB output data, 5bits of timing and control output data(HSYNC, VSYNC, DE, CTL1 and CTL2)
are transmitted available.
■Support clock frequency from 8MHz up to 112MHz.
■Support consumer video format including 480i, 480P, 720P and 1080i as well.
■Support many kinds of PC video formats such as VGA, SVGA, XGA and SXGA.
■Provide 784Mbps per 1ch or 3.92Gbps per device throughput rate using 112MHz clock rate.
■User programmable LVCMOS data output triggering timing by using either rising or falling edge of clock.
■30bit LVDS transmitter is recommended to use BU8254KVT.
Flat Panel Display
･This chip is not designed to protect from radioactivity.
･The chip is made strictly for the specific application or equipment.
Then it is necessary that the unit is measured as need.
･This document may be used as strategic technical data which subjects to COCOM regulations.
Status of this document
The Japanese version of this document is the formal specification.
A customer may use this translation version only for a reference to help reading the formal version.
If there are any differences in translation version of this document, formal version takes priority.