900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf






Ramtron

FM25L256B Datasheet Preview

FM25L256B Datasheet

3V F-RAM Memory

No Preview Available !

www.DataSheet.co.kr
FM25L256B
256Kb FRAM Serial 3V Memory
Features
Write Protection Scheme
256K bit Ferroelectric Nonvolatile RAM
Organized as 32,768 x 8 bits
Hardware Protection
Software Protection
Unlimited Read/Write Cycles
45 Year Data Retention
NoDelay™ Writes
Low Power Consumption
Low Voltage Operation 2.7V – 3.6V
Advanced High-Reliability Ferroelectric Process
Industry Standard Configurations
Very Fast Serial Peripheral Interface - SPI
Up to 20 MHz Frequency
DDirect Hardware Replacement for EEPROM
SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1)
DEDescription
N SThe FM25L256B is a 256-kilobit nonvolatile
memory employing an advanced ferroelectric
E Nprocess. A ferroelectric random access memory or
FRAM is nonvolatile and performs reads and writes
M IGlike a RAM. It provides reliable data retention for 45
years while eliminating the complexities, overhead,
and system level reliability problems caused by
M S 2EEPROM and other nonvolatile memories.
O E V0Unlike serial EEPROMs, the FM25L256B performs
5write operations at bus speed. No write delays are
C D 2incurred. Data is written to the memory array
Mimmediately after each byte has been transferred to
Ethe device. The next bus cycle may commence
W : Fwithout the need for data polling. In addition, the
R E eproduct offers virtually unlimited write endurance.
tivFRAM also exhibits much lower power consumption
than EEPROM.
OT N rnaThese capabilities make the FM25L256B ideal for
nonvolatile memory applications requiring frequent
N R lteor rapid writes or low power operation. Examples
range from data collection, where the number of
O Awrite cycles may be critical, to demanding industrial
Fcontrols where the long write time of EEPROM can
Industrial Temperature -40°C to +85°C
8-pin SOIC and 8-pin TDFN Packages
“Green”/RoHS Packaging
Pin Configuration
CS
SO
WP
VSS
1
2
3
4
8 VDD
7 HOLD
6 SCK
5 SI
/CS 1
SO 2
/WP 3
VSS 4
8 VDD
7 /HOLD
6 SCK
5 SI
Top View
Pin Name
/CS
/WP
/HOLD
SCK
SI
SO
VDD
VSS
Function
Chip Select
Write Protect
Hold
Serial Clock
Serial Data Input
Serial Data Output
Supply Voltage (2.7 to 3.6V)
Ground
cause data loss.
The FM25L256B provides substantial benefits to
users of serial EEPROM as a hardware drop-in
replacement. The FM25L256B uses the high-speed
SPI bus, which enhances the high-speed write
capability of FRAM technology. Device
specifications are guaranteed over an industrial
temperature range of -40°C to +85°C.
Ordering Information
FM25L256B-G*
“Green”/RoHS 8-pin SOIC
FM25L256B-GTR* “Green”/RoHS 8-pin SOIC
in Tape & Reel
FM25L256B-DG* “Green”/RoHS 8-pin TDFN
FM25L256B-DGTR* “Green”/RoHS 8-pin TDFN
in Tape & Reel
* End of life. Last time buy Nov. 2009.
This product conforms to specifications per the terms of the Ramtron
standard warranty. The product has completed Ramtron’s internal
qualification testing and has reached production status.
Rev. 3.1
Oct. 2009
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
http://www.ramtron.com
Page 1 of 14
Datasheet pdf - http://www.DataSheet4U.net/




Ramtron

FM25L256B Datasheet Preview

FM25L256B Datasheet

3V F-RAM Memory

No Preview Available !

www.DataSheet.co.kr
FM25L256B
WP
CS
HOLD
SCK
Instruction Decode
Clock Generator
Control Logic
Write Protect
Instruction Register
8192 x 32
FRAM Array
Address Register
Counter
15
8
DSI
Data I/O Register
SO
E3
ND SNonvolatile Status
Register
ME IGNFigure 1. Block Diagram
M S 2Pin Descriptions
O E V0Pin Name
5/CS
I/O
Input
EC W DFM2SCK Input
T R NE ative:/HOLD
Input
NO R ltern/WP Input
FO ASI Input
Description
Chip Select: This active low input activates the device. When high, the device enters
low-power standby mode, ignores other inputs, and all outputs are tri-stated. When
low, the device internally activates the SCK signal. A falling edge on /CS must occur
prior to every op-code.
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on
the rising edge and outputs occur on the falling edge. Since the device is static, the
clock frequency may be any value between 0 and 20 MHz and may be interrupted at
any time.
Hold: The /HOLD pin is used when the host CPU must interrupt a memory operation
for another task. When /HOLD is low, the current operation is suspended. The device
ignores any transition on SCK or /CS. All transitions on /HOLD must occur while
SCK is low.
Write Protect: This active low pin prevents write operations to the status register only.
A complete explanation of write protection is provided on pages 6 and 7.
Serial Input: All data is input to the device on this pin. The pin is sampled on the
rising edge of SCK and is ignored at other times. It should always be driven to a valid
logic level to meet IDD specifications.
* SI may be connected to SO for a single pin data interface.
SO Output Serial Output: This is the data output pin. It is driven during a read and remains tri-
stated at all other times including when /HOLD is low. Data transitions are driven on
the falling edge of the serial clock.
* SO may be connected to SI for a single pin data interface.
VDD
Supply Power Supply (2.7V to 3.6V)
VSS Supply Ground
Rev. 3.1
Oct. 2009
Page 2 of 14
Datasheet pdf - http://www.DataSheet4U.net/


Part Number FM25L256B
Description 3V F-RAM Memory
Maker Ramtron
PDF Download

FM25L256B Datasheet PDF






Similar Datasheet

1 FM25L256 3V F-RAM Memory
Ramtron
2 FM25L256B 3V F-RAM Memory
Ramtron





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy