2305 buffer equivalent, 3.3v zero-delay clock buffer.
▪ Phase-Lock Loop clock distribution ▪ 10MHz to 133MHz operating frequency ▪ Distributes one clock input to one bank of five
outputs ▪ Zero input-output delay ▪ Output sk.
The zero-delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the r.
The 2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero-delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range o.
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