Datasheet Details
| Part number | 8A34004 |
|---|---|
| Manufacturer | Renesas |
| File Size | 2.22 MB |
| Description | Synchronization Management Unit |
| Datasheet |
 8A34004 Datasheet
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General Description
The 8A34004 is a Synchronization Management Unit (SMU) for packet based and physical layer based equipment synchronization.
Key Features
- Two independent timing channels.
- Each can act as a frequency synthesizer, jitter attenuator, Digitally Controlled Oscillator (DCO), or Digital Phase Lock Loop (DPLL).
- DPLLs generate telecom compliant clocks.
- Compliant with ITU-T G.8262 for Synchronous Ethernet.
- Compliant with legacy SONET/SDH and PDH requirements.
- DPLL Digital Loop Filters (DLFs) are programmable with cut off frequencies from 12µHz to 22kHz.
- DPLL/DCO channels share frequency in.