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9DB633 - Differential Buffer

General Description

The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1.

The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator.

Key Features

  • Benefits:.
  • OE# pins/Suitable for Express Card.

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Datasheet Details

Part number 9DB633
Manufacturer Renesas
File Size 297.84 KB
Description Differential Buffer
Datasheet download datasheet 9DB633 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DATASHEET Six Output Differential Buffer for PCIe Gen3 9DB633 Recommended Application: 6 output PCIe Gen3 zero-delay/fanout buffer General Description: The 9DB633 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB633 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9DB633 suitable for Express Card applications.