zero-delay/fanout buffer.
* 4 - 1-200Hz Low-Power (LP) HCSL DIF pairs
w/ZO=100ohms
Key Specifications
* DIF cycle-to-cycle jitter <50ps
* DIF output-to-output skew <50ps
* DIF addi.
via software frequency selection. The device has 4 output enables for clock management, and 3 selectable SMBus addresses.
The 9DBV0431 is a member of IDT's SOC-Friendly 1.8V Very-Low-Power (VLP) PCIe family. It can also be used for 50M or 125M Ethernet Applications via software frequency selection. The device has 4 output enables for clock management, and 3 selectable S.
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