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F1951 - Digital Step Attenuator

Description

This document describes the specification for the F1951 Digital Step Attenuator.

The F1951 is part of a family of Glitch-FreeTM DSAs optimized for the demanding requirements of communications Infrastructure.

Features

  • Glitch-FreeTM, < 0.6 dB transient overshoot.
  • Spurious Free Design.
  • 3 V to 5.25 V supply.
  • Attenuation Error < 0.2 dB @ 2 GHz.
  • Low Insertion Loss < 1.2 dB @ 2 GHz.
  • Excellent Linearity +65 dBm IP3I.
  • Fast settling time, < 450 ns.
  • Class 2 JEDEC ESD (> 2kV HBM).
  • Serial Interface 31.5 dB Range.
  • Stable Integral Non-Linearity over temperature.
  • 4x4 mm Thin QFN 24 pin package BLOCK.

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Datasheet Details

Part number F1951
Manufacturer Renesas
File Size 2.77 MB
Description Digital Step Attenuator
Datasheet download datasheet F1951 Datasheet

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Full PDF Text Transcription

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DESCRIPTION This document describes the specification for the F1951 Digital Step Attenuator. The F1951 is part of a family of Glitch-FreeTM DSAs optimized for the demanding requirements of communications Infrastructure. These devices are offered in a compact 4x4 QFN package with 50 Ω impedances for ease of integration into the radio system. COMPETITIVE ADVANTAGE Digital step attenuators are used in Receivers and Transmitters to provide gain control. The F1951 is a 6bit step attenuator optimized for these demanding applications. The silicon design has very low insertion loss and low distortion (+65 dBm IP3I.). The device has pinpoint accuracy and settles to final attenuation value within 400 nsec.
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