HD74CDCV857 Datasheet PDF (2.5-V Phase-lock Loop Clock Driver)

HD74CDCV857 - 2.5-V Phase-lock Loop Clock Driver

Description

REJ03D0135

The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver.

It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs.

Features

DDR266 / PC2100-Compliant.
Supports 60 MHz to 170 MHz operation range.
Distributes one differential clock input pair to ten differential clock outputs pairs.
Supports spread spectrum clock requirements meeting the PC100 SDRAM registered DIMM specification.
External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input.
Supports 2.5V analog supply voltage (AVCC), and 2.5 V VDDQ.
No external RC network requ.

Datasheet Details

Part number	HD74CDCV857
Manufacturer	Renesas
File Size	217.72 KB
Description	2.5-V Phase-lock Loop Clock Driver
Datasheet	HD74CDCV857 Datasheet
Additional preview pages of the HD74CDCV857 datasheet.

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Full PDF Text Transcription

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HD74CDCV857 2.5-V Phase-lock Loop Clock Driver Description REJ03D0135–0700Z (Previous ADE-205-335E (Z)) Preliminary Rev.7.00 Oct.09.2003 The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs. Features • DDR266 / PC2100-Compliant • Supports 60 MHz to 170 MHz operation range • Distributes one differential clock input pair to ten differential clock outputs pairs • Supports spread spectrum clock requirements meeting the PC100 SDRAM registered DIMM specification • External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input • Supports 2.5V analog supply voltage (AVCC), and 2.

Published: Dec 4, 2017 |