HD74HC390 Datasheet PDF (Dual Decade Counters)

HD74HC390 - Dual Decade Counters

Description

The HD74HC390 incorporate dual decade counters, each composed of a divide-by-two and a divide-by-five counter.

The divide-by-two and divide-by-five counters can be cascaded to form dual decade, dual bi-quinary, or various combinations up to a single divide-by-100 counter.

Features

High Speed Operation: tpd (Clock A to QA) = 11 ns typ (CL = 50 pF).
High Output Current: Fanout of 10 LSTTL Loads.
Wide Operating Voltage: VCC = 2 to 6 V.
Low Input Current: 1 µA max.
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C).
Ordering Information Par.

Datasheet Details

Part number	HD74HC390
Manufacturer	Renesas
File Size	195.31 KB
Description	Dual Decade Counters
Datasheet	HD74HC390 Datasheet
Additional preview pages of the HD74HC390 datasheet.

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Full PDF Text Transcription

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HD74HC390 Dual Decade Counters REJ03D0624-0200 (Previous ADE-205-503) Rev.2.00 Mar 30, 2006 Description The HD74HC390 incorporate dual decade counters, each composed of a divide-by-two and a divide-by-five counter. The divide-by-two and divide-by-five counters can be cascaded to form dual decade, dual bi-quinary, or various combinations up to a single divide-by-100 counter. The HD74HC390 is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set high all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide-by-N counter configurations.

Published: Dec 4, 2017 |