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HD74LS164 - 8-Bit Parallel-Out Serial-in Shift Register

Features

  • gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data as a low at either (or both) input(s) inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input which will them determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup requirements will b.

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Datasheet Details

Part number HD74LS164
Manufacturer Renesas
File Size 85.57 KB
Description 8-Bit Parallel-Out Serial-in Shift Register
Datasheet download datasheet HD74LS164 Datasheet
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Full PDF Text Transcription

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HD74LS164 8-Bit Parallel-Out Serial-in Shift Register REJ03D0448–0200 Rev.2.00 Feb.18.2005 This 8-bit shift register features gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data as a low at either (or both) input(s) inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input which will them determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup requirements will be entered. Clocking occurs on the low-to-high-level transition of the clock input.
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