M6MGT321S4TP sram equivalent, cmos sram.
DINOR (Divided bit-line NOR) architecture for the memory cell. Access Time Flash 85ns (Max.) 4M-bit SRAM is a 524,288 bytes / 262,144 words SRAM 85ns (Max.) asynchronous .
M6MGB/T321S4TP provides for Software Lock Release function. Usually, all memory blocks are locked and can not be programmed or erased, when F-WP# is low. Using Software Lock Release function, program or erase operation 32M-bit Flash memory is a 4,194.
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