Datasheet4U Logo Datasheet4U.com

M6MGT331S4BKT - CMOS SRAM

Description

The M6MGB/T331S4BKT is a Stacked micro Multi Chip Package (S- µMCP) that contents 32M-bit Flash memory and 4M-bit Static RAM in a 52-pin TSOP for lead free use.

Features

  • 3.3V-only, and high performance non-volatile memory fabricated by CMOS technology for the peripheral circuit and Access Time DINOR (Divided bit-line NOR) architecture for the memory cell. 4M-bit SRAM is a 524,288 bytes / 262,144 words asynchronous SRAM fabricated by silicon-gate CMOS technology. M6MGB/T331S4BKT is suitable for the.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
M6MGT160S2BVP CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-MCP Mitsubishi
M6MGT160S4BVP CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-MCP Mitsubishi
M6MGT162S2BVP CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-MCP Mitsubishi
M6MGT162S4BVP CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-MCP Mitsubishi
M6MGT166S2BWG CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-CSP Mitsubishi

Other Datasheets by Renesas

Part Number Description
M6MGT331S8AKT CMOS SRAM
M6MGT331S8BKT CMOS SRAM
M6MGT33BS8AWG-P CMOS SRAM
M6MGT33BS8BWG CMOS SRAM
M6MGT33BS8BWG-P CMOS SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com Preliminary Notice: This is not a final specification. Some parametric limits are subject to change. Renesas LSIs M6MGB/T331S4BKT 33,554,432-BIT (2,097,152 - WORD BY 16-BIT/4,194,304-WORD BY 8-BIT) CMOS 3.3V-ONLY FLASH MEMORY & 4,194,304-BIT (262,144-WORD BY 16-BIT/524,288-WORD BY 8-BIT) CMOS SRAM Stacked - µ MCP (micro Multi Chip Package) Description The M6MGB/T331S4BKT is a Stacked micro Multi Chip Package (S- µMCP) that contents 32M-bit Flash memory and 4M-bit Static RAM in a 52-pin TSOP for lead free use. 32M-bit Flash memory is a 4,194,304 bytes / 2,097,152 words, Features 3.3V-only, and high performance non-volatile memory fabricated by CMOS technology for the peripheral circuit and Access Time DINOR (Divided bit-line NOR) architecture for the memory cell.
Published: |