R5F523T3ADFL Overview
Datasheet RX23T Group Renesas MCUs R01DS0248EJ0110 Rev.1.10 Jan 13, 2016 40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS, 12-bit ADC (equipped with three S/H circuits, double data registers, and parator) 40MHz PWM (three-phase plementary output.
R5F523T3ADFL Key Features
- 32-bit RX CPU core
- Max. operating frequency: 40 MHz Capable of 65.6 DMIPS in operation at 40 MHz
- Enhanced DSP: 32-bit multiply-accumulate and 16-bit multiply-subtract instructions supported
- Built-in FPU: 32-bit single-precision floating point (pliant to IEEE754)
- Divider (fastest instruction execution takes two CPU clock cycles)
- Fast interrupt
- CISC Harvard architecture with 5-stage pipeline
- Variable-length instructions, ultra-pact code
- On-chip debugging circuit
- Memory protection unit (MPU) supported