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HD74LS165A - Parallel-Load 8-bit Shift Register

Features

  • Ordering Information Part Name HD74LS165AP HD74LS165AFPEL Package Type DILP-16 pin SOP-16 pin (JEITA) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) Package Abbreviation P FP Taping Abbreviation (Quantity).
  • EL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Pin Arrangement Shift/ Load Clock E Parallel Inputs F G H Output QH GND 1 2 3 4 5 6 7 8 Shift/Load Clock CK Inhibit E F G H QH D C B A Serial QH Inp.

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Datasheet Details

Part number HD74LS165A
Manufacturer Renesas
File Size 121.29 KB
Description Parallel-Load 8-bit Shift Register
Datasheet download datasheet HD74LS165A Datasheet

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www.DataSheet4U.com HD74LS165A Parallel-Load 8-bit Shift Register REJ03D0449–0300 Rev.3.00 Jul.15.2005 The LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual direct data inputs that are enabled by a low level at the shift / load input. These registers also feature gated clock inputs and complementary outputs from the eighth bit. All inputs are diode-clamped to minimize transmission-line effects, thereby simplifying system design. Clocking is accomplished through a 2-input positive-NOR gate, permitting one input to be used as a clock-inhibit function.
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