H5TQ1G63EFR-xxL Key Features
- DQ Power & Power supply : VDD & VDDQ = 1.5V +/0.075V
- DQ Ground supply : VSSQ = Ground
- Fully differential clock inputs (CK, CK) operation
- Differential Data Strobe (DQS, DQS)
- On chip DLL align DQ, DQS and DQS transition with CK transition
- DM masks write data-in at the both rising and falling edges of the data strobe
- All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock
- Programmable additive latency 0, CL-1, and CL-2 supported
- Programmable burst length 4/8 with both nibble sequential and interleave mode
- Programmable PASR(Partial Array Self-Refresh) for Digital consumer
