CI-MCP Specification 16GB eNAND (x8) + 16Gb LPDDR3 (x32) This document is a general product description and is subject to change without notice. SK h

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4Gb: x4, x8, x16 DDR3 SDRAM Features DDR3 SDRAM (TBD)1024M4 – 128 Meg x 4 x 8 Banks (TBD)512M8 – 64 Meg x 8 x 8 Banks (IMD256M16R30HG8GNF-125/107)256M

4Gb: x4, x8, x16 DDR3L SDRAM Description DDR3L SDRAM MT41K1G4 – 128 Meg x 4 x 8 banks MT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8

4Gb: x4, x8, x16 DDR3 SDRAM Features DDR3 SDRAM MT41J1G4 – 128 Meg x 4 x 8 banks MT41J512M8 – 64 Meg x 8 x 8 banks MT41J256M16 – 32 Meg x 16 x 8 bank

Sep. 2020 SCB13H4Gxx0AF 4Gbit DDR3L SDRAM EU RoHS Compliant Products Data Sheet Rev. G Data Sheet SCB13H4Gxx0AF 4-Gbit DDR3L SDRAM Revision History

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ESMT M15T1G1664A (2C) DDR3(L) SDRAM Feature  Interface and Power Supply  SSTL_135: VDD/VDDQ = 1.35V(-0.067V/+0.1V)  SSTL_15: VDD/VDDQ = 1.5V(±0.0

www.DataSheet4U.com 240pin DDR3 SDRAM Unbuffered DIMMs DDR3 SDRAM Unbuffered DIMMs Based on 1Gb A version HMT164U6AFP(R)6C HMT112U6AFP(R)8C HMT112U7

ESMT DDR3(L) SDRAM Feature  Interface and Power Supply ˗ SSTL_135: VDD/VDDQ = 1.35V(-0.067V/+0.1V) ˗ SSTL_15: VDD/VDDQ = 1.5V(±0.075V)  JEDEC DDR3(L

TECHNOLOGY DDR3 SDRAM Memory Specifications D2516EC4BXGGB 4G bits DDR3L SDRAM (256M words x 16 bits) Document No. 4806841-001.A00 06/10/13 Page 1

ESMT DDR3(L) SDRAM Feature  Interface and Power Supply ˗ SSTL_135: VDD/VDDQ = 1.35V(-0.067V/+0.1V) ˗ SSTL_15: VDD/VDDQ = 1.5V(±0.075V)  JEDEC DDR3(L

ESMT DDR3(L) SDRAM Feature  Interface and Power Supply ˗ SSTL_15: VDD/VDDQ = 1.5V(±0.075V) ˗ SSTL_135: VDD/VDDQ = 1.35V(-0.067V/+0.1V)  JEDEC DDR3(L

2Gb: x4, x8, x16 DDR3L SDRAM Description DDR3L SDRAM MT41K512M4 – 64 Meg x 4 x 8 banks MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x

ESMT DDR3(L) SDRAM Feature  Interface and Power Supply ˗ SSTL_135: VDD/VDDQ = 1.35V(-0.067V/+0.1V) ˗ SSTL_15: VDD/VDDQ = 1.5V(±0.075V)  JEDEC DDR3(L

Rev. 0.0, May. 2015 K4E6E304EB Target 16Gb DDP LPDDR3 SDRAM 178FBGA, 11x11.5 256M x32 (32M x32 x 8banks) + 256M x32 (32M x32 x 8banks) This document a