900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf




STMicroelectronics Electronic Components Datasheet

74LVX574 Datasheet

LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP

No Preview Available !

74LVX574
LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP
(3-STATE NON INV.) WITH 5V TOLERANT INPUTS
s HIGH SPEED:
fMAX = 125MHz (TYP.) at VCC = 3.3V
s 5V TOLERANT INPUTS
s POWER-DOWN PROTECTION ON INPUTS
s INPUT VOLTAGE LEVEL:
)VIL = 0.8V, VIH = 2V at VCC = 3V
t(ss LOW POWER DISSIPATION:
cICC = 4 µA (MAX.) at TA=25°C
us LOW NOISE:
dVOLP = 0.3V (TYP.) at VCC =3.3V
ros SYMMETRICAL OUTPUT IMPEDANCE:
P|IOH| = IOL = 4 mA (MIN) at VCC =3V
tes BALANCED PROPAGATION DELAYS:
letPLH tPHL
s OPERATING VOLTAGE RANGE:
soVCC(OPR) = 2V to 3.6V (1.2V Data Retention)
bs PIN AND FUNCTION COMPATIBLE WITH
O74 SERIES 574
-s IMPROVED LATCH-UP IMMUNITY
t(s)DESCRIPTION
cThe 74LVX574 is a low voltage CMOS OCTAL
uD-TYPE FLIP-FLOP with 3 STATE OUTPUT NON
dINVERTING fabricated with sub-micron silicon
rogate and double-layer metal wiring C2MOS
Ptechnology. It is ideal for low power, battery
teoperated and low noise 3.3V applications.
This 8 bit D-Type flip-flop is controlled by a clock
leinput (CK) and an output enable input (OE). On
othe positive transition of the clock, the Q outputs
bswill be set to the logic state that were setup at the
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LVX574MTR
74LVX574TTR
D inputs. While the (OE) input is low, the 8 outputs
will be in a normal logic state (high or low logic
level) and while high level the outputs will be in a
high impedance state. The output control does not
affect the internal operation of flip flops; that is, the
old data can be retained or the new data can be
entered even while the outputs are off.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
OFigure 1: Pin Connection And IEC Logic Symbols
August 2004
Rev. 3
1/13


STMicroelectronics Electronic Components Datasheet

74LVX574 Datasheet

LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP

No Preview Available !

74LVX574
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL NAME AND FUNCTION
1 OE 3-State Output Enable
Input (Active LOW)
2, 3, 4, 5, 6, D0 to D7 Data Inputs
7, 8, 9
12, 13, 14,
15, 16, 17,
18, 19
Q0 to Q7 3-State Outputs
11 CK Clock Input (LOW-to-HIGH
Edge Triggered)
t(s)Table 3: Truth Table
roducOE
PH
teL
leL
soL
bX : Don’t Care
OZ : High Impedance
Obsolete Product(s) -Figure 3: Logic Diagram
INPUTS
CK
X
10 GND Ground (0V)
20 VCC Positive Supply Voltage
OUTPUT
DQ
XZ
X NO CHANGE
LL
HH
This logic diagram has not be used to estimate propagation delays
2/13


Part Number 74LVX574
Description LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP
Maker STMicroelectronics
Total Page 13 Pages
PDF Download

74LVX574 Datasheet PDF

View PDF for Mobile








Similar Datasheet

1 74LVX573 Low Voltage Octal Latch with 3-STATE Outputs
Fairchild Semiconductor
2 74LVX573 LOW VOLTAGE CMOS OCTAL D-TYPE LATCH
ST Microelectronics
3 74LVX574 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
Fairchild Semiconductor
4 74LVX574 LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP
STMicroelectronics





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy