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STMicroelectronics Electronic Components Datasheet

M27256 Datasheet

NMOS 256K 32K x 8 UV EPROM

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M27256
NMOS 256K (32K x 8) UV EPROM
FAST ACCESS TIME: 170ns
EXTENDED TEMPERATURE RANGE
SINGLE 5V SUPPLY VOLTAGE
LOW STANDBY CURRENT: 40mA max
TTL COMPATIBLE DURING READ and
PROGRAM
FAST PROGRAMMING ALGORITHM
ELECTRONIC SIGNATURE
PROGRAMMING VOLTAGE: 12V
28
1
FDIP28W (F)
DESCRIPTION
The M27256 is a 262,144 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 32.768 words by 8 bits.
The M27256 is housed in a 28 pin Window Ceramic
Frit-Seal Dual-in-Line package. The transparent lid
allows the user to expose the chip to ultraviolet light
to erase the bit pattern. A new pattern can then be
written to the device by following the programming
procedure.
Figure 1. Logic Diagram
VCC VPP
15
A0-A14
8
Q0-Q7
Table 1. Signal Names
A0 - A14
Q0 - Q7
E
G
VPP
VCC
VSS
Address Inputs
Data Outputs
Chip Enable
Output Enable
Program Supply
Supply Voltage
Ground
E M27256
G
VSS
AI00767B
March 1995
1/10


STMicroelectronics Electronic Components Datasheet

M27256 Datasheet

NMOS 256K 32K x 8 UV EPROM

No Preview Available !

M27256
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
TA Ambient Operating Temperature
grade 1
grade 6
0 to 70
–40 to 85
°C
TBIAS
Temperature Under Bias
grade 1
grade 6
–10 to 80
–50 to 95
°C
TSTG
Storage Temperature
–65 to 125
°C
VIO Input or Output Voltages
–0.6 to 6.25
V
VCC Supply Voltage
–0.6 to 6.25
V
VA9 VA9 Voltage
–0.6 to 13.5
V
VPP Program Supply
–0.6 to 14
V
Note: Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause
permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those
indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods
may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.
Figure 2. DIP Pin Connections
VPP 1
A12 2
28 VCC
27 A14
A7 3
26 A13
A6 4
25 A8
A5 5
24 A9
A4 6
23 A11
A3 7
22 G
M27256
A2 8
21 A10
A1 9
20 E
A0 10
19 Q7
Q0 11
18 Q6
Q1 12
17 Q5
Q2 13
16 Q4
VSS 14
15 Q3
AI00768
DEVICE OPERATION
The eight modes of operations of the M27256 are
listed in the Operating Modes Table. A single 5V
power supply is required in the read mode. All
inputs are TTL levels except for VPP and 12V on A9
for Electronic Signature.
Read Mode
The M27256 has two control functions, both of
which must be logically satisfied in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, address access time (tAVQV)
is equal to the delay from E to output (tELQV). Data
is available at the outputs after the falling edge of
G, assuming that E has been low and the ad-
dresses have been stable for at least tAVQV-tGLQV.
Standby Mode
The M27256 has a standby mode which reduces
the maximum active power current from 100mA to
40mA. The M27256 is placed in the standby mode
by applying a TTL high signal to the E input. When
in the standby mode, the outputs are in a high
impedance state, independent of the G input.
Two Line Output Control
Because EPROMs are usually used in larger mem-
ory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
2/10


Part Number M27256
Description NMOS 256K 32K x 8 UV EPROM
Maker STMicroelectronics
Total Page 10 Pages
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