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SPEAr300 - Embedded Microprocessors

Description

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8 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 2.14 2.15 2.16 www.DataSheet4U.com ARM 926EJ-S CPU

Features

  • and human machine interface Features.
  • ARM926EJ-S core up to 333 MHz High-performance 8-channel DMA Dynamic power-saving features Configurable peripheral functions multiplexed on 102 shared I/Os Memory.
  • 32 KB ROM and 57 KB internal SRAM.
  • LPDDR-333/DDR2-666 external memory interface.
  • Flexible static memory controller (FSMC) up to 16-bit data bus width, supporting external SRAM, NAND/NOR Flash and FPGAs.
  • Serial SPI Flash interface.

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Datasheet preview – SPEAr300

Datasheet Details

Part number SPEAr300
Manufacturer STMicroelectronics
File Size 726.46 KB
Description Embedded Microprocessors
Datasheet download datasheet SPEAr300 Datasheet
Additional preview pages of the SPEAr300 datasheet.
Other Datasheets by ST Microelectronics

Full PDF Text Transcription

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SPEAr300 Embedded MPU with ARM926 core, flexible memory support, powerful connectivity features and human machine interface Features ■ ■ ■ ■ ■ ARM926EJ-S core up to 333 MHz High-performance 8-channel DMA Dynamic power-saving features Configurable peripheral functions multiplexed on 102 shared I/Os Memory – 32 KB ROM and 57 KB internal SRAM – LPDDR-333/DDR2-666 external memory interface – Flexible static memory controller (FSMC) up to 16-bit data bus width, supporting external SRAM, NAND/NOR Flash and FPGAs – Serial SPI Flash interface – SDIO/MMC card interface LFBGA289 (15 x 15 x 1.7 mm) – – – – 8-channel 10-bit ADC, 1 Msps 1-bit DAC JPEG codec accelerator Six 16-bit general purpose timers with capture mode and programmable prescaler – Up to 44 GPIOs Connectivity – 2 x USB 2.
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