SPEAr600 Description
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SPEAr600 Key Features
- production data
- Dual ARM926EJ-S core up to 333 MHz
- Each with 16 Kbytes instruction cache + 16 Kbytes data cache
- High performance 8-channel DMA
- Dynamic power saving features
- Up to 733 DMIPS
- Memory
- External DRAM interface: 8/16-bit DDR1333 / DDR2
- 32 Kbytes BootROM / 8 Kbytes internal SRAM
- Flexible static memory controller (FSMC) supporting parallel NAND Flash memory interface, ONFI 1.0 support, internal 1-b
SPEAr600 Applications
- The SPEAr® embedded MPU family targets networked devices used for munication, display and control. This includes diverse consumer, business, industrial and life