Download STA5620 Datasheet PDF
STA5620 page 2
Page 2
STA5620 page 3
Page 3

STA5620 Key Features

  • Low IF architecture (fIF = 4fO)
  • Minimum external ponents
  • 6 Pins description
  • 7 Functional description
  • 9 IF section
  • 9 Variable gain amplifiers
  • 9 A/D converter
  • 9 PLL synthesizer and VCO
  • 10 Crystal oscillator
  • 10 Output buffers

STA5620 Description

The chip is a fully integrated RF front-end able to down-convert the GPS L1 signal from 1575.42MHz to 4.092MHz. The IF signal is converted by a two bit ADC. Sign (SIGN), Magnitude (MAG) and the 16.368MHz sampling clock (GPS_CLK) are provided to the baseband.