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STG5223 - dual SPDT switch

General Description

The STG5223 is a high-speed CMOS dual analog SPDT (single pole dual throw) switch or dual 2:1 multiplexer/demultiplexer bus switch fabricated in silicon gate C2MOS technology.

It is designed to operate from 1.65 to 4.3 V, making this device ideal for portable applications.

Key Features

  • Ultra low power dissipation: www. DataSheet4U. com ICC = 0.2 μA (max. ) at TA= 85.
  • °C Low ON resistance:.
  • RON = 0.50 Ω (max. TA = 25 °C) at VCC = 4.3 V.
  • RON = 0.55 Ω (max. TA = 25 °C) at VCC = 3.6 V.
  • RON = 0.55 Ω (max. TA = 25 °C) at VCC = 3.0 V Wide operating voltage range: VCC (opr) = 1.65 V to 4.3 V single supply 5 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 to 4.3 V Latch-up performance exceeds 300 mA (JESD 17) ESD per.

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Full PDF Text Transcription for STG5223 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for STG5223. For precise diagrams, and layout, please refer to the original PDF.

STG5223 Low voltage 0.5 Ω dual SPDT switch with break-before-make Features ■ Ultra low power dissipation: www.DataSheet4U.com ICC = 0.2 μA (max.) at TA= 85 ■ °C Low ON re...

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tion: www.DataSheet4U.com ICC = 0.2 μA (max.) at TA= 85 ■ °C Low ON resistance: – RON = 0.50 Ω (max. TA = 25 °C) at VCC = 4.3 V – RON = 0.55 Ω (max. TA = 25 °C) at VCC = 3.6 V – RON = 0.55 Ω (max. TA = 25 °C) at VCC = 3.0 V Wide operating voltage range: VCC (opr) = 1.65 V to 4.3 V single supply 5 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 to 4.3 V Latch-up performance exceeds 300 mA (JESD 17) ESD performance: HBM > 2 kV (MIL STD 883 method 3015) QFN10L (1.8 x 1.