STM8S005C6
Overview
- Max fCPU: 16 MHz
- Advanced STM8 core with Harvard architecture and 3-stage pipeline
- Extended instruction set Memories
- Medium-density Flash/EEPROM - Program memory: 32 Kbytes of Flash memory; data retention 20 years at 55 °C after 100 cycles - Data memory: 128 bytes true data EEPROM; endurance up to 100 k write/erase cycles
- RAM: 2 Kbytes Clock, reset and supply management
- 2.95 V to 5.5 operating voltage
- Flexible clock control, 4 master clock sources - Low-power crystal resonator oscillator - External clock input - Internal, user-trimmable 16 MHz RC - Internal low-power 128 kHz RC
- Clock security system with clock monitor
- Power management - Low-power modes (wait, active-halt, halt) - Switch-off peripheral clocks individually - Permanently active, low-consumption power-on and power-down reset Interrupt management
- Nested interrupt controller with 32 interrupts
