Speed CAS Latency tRCD(min) tRP(min) tRC(min) DDR2-533 4-4-4 4 15 15 55 DDR2-400 3-3-3 3 15 15 55 Units tCK ns ns ns
* JEDEC standard 1.8V ± 0.1V Power Supply
* .

The chip is designed to comply with the following key DDR2 SDRAM features such as posted CAS with additive latency, wri.

2.3 Addressing 3. Absolute Maximum Rating 4. AC & DC Operating Conditions & Specifications Page 2 of 29 Rev. 1.4 Feb. 2005 512Mb B-die DDR2 SDRAM 0. Ordering Information Organization 128Mx4 K4T51043QB-ZCD5 K4T51083QB-GCD5 64Mx8 K4T51083QB-ZCD5 K.

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