K6R1008V1B-L Datasheet | Samsung Semiconductor

K6R1008V1B-C/B-L, K6R1008V1B-I/B-P Document Title Preliminary PRELIMINARY CMOS SRAM 128Kx8 Bit High Speed Static RAM(3.3V Operating), Revolutionary Pin out. Operated at mercial and Industrial Temperature Ranges. Revision History Rev No. Rev. 0.0 Rev.1.0 History Initial release with Design Target. Release to Preliminary Data Sheet. 1.1. Replace Design Target to Preliminary. Release to Final Data Sheet. 2.1. Delete Preliminary. 2.2. Delete 32-SOJ-300 package. 2.3. Add Capacitive load of the test environment in A.C test load. 2.4. Change D.C characteristics. Previous spec. Changed spec. Items (8/10/12ns part) (8/10/12ns part) ICC 160/150/140m A 160/155/150m A ISB 30m A 50m A Change Standby and Data Retention Current for L-ver. Items Previous spec. Changed spec. ISB1 0.5m A 0.7m A IDR at 3.0V 0.4m A 0.5m A IDR at 2.0V 0.3m A 0.4m A Draft Data Apr. 1st, 1997 Jun. 1st, 1997 Remark Design Target Preliminary Rev.2.0 Feb. 25th, 1998 Final .. Rev. 2.1 Aug. 4th, 1998 Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. -1- Rev 2.1 August 1998 K6R1008V1B-C/B-L, K6R1008V1B-I/B-P 128K x 8 Bit High-Speed CMOS Static RAM(3.3V Operating) Features - Fast Access Time 8,10,12ns(Max.) - Low Power Dissipation Standby (TTL) : 50m A(Max.) (CMOS) : 5m A(Max.) 0.7m A(Max.) - L-Ver. only Operating K6R1008V1B-8 : 160m A(Max.) K6R1008V1B-10 : 155m A(Max.) K6R1008V1B-12 : 150m A(Max.) - Single 3.3±0.3V Power Supply - TTL patible Inputs and Outputs - Fully Static Operation - No Clock or Refresh required - Three State Outputs - 2V Minimum Data Retention ; L-Ver. only .. - Center Power/Ground Pin Configuration - Standard Pin...