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K7A203200A - 64Kx32-Bit Synchronous Pipelined Burst SRAM

Description

The K7A203200A is a 2,097,152-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System.

Features

  • Synchronous Operation. 2 Stage Pipelined operation with 4 Burst. On-Chip Address Counter. Self-Timed Write Cycle. On-Chip Address and Control Registers. VDD= 3.3V+0.3V/-0.165V Power Supply. VDDQ Supply Voltage 3.3V+0.3V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O. 5V Tolerant Inputs Except I/O Pins. Byte Writable Func.

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