LH531000B-S Description
The LH531000B-S is a mask-programmable ROM organized as 131,072 × 8 bits. It is fabricated using silicon-gate CMOS process technology. LH531000B-S Block Diagram PIN DESCRIPTION SIGNAL PIN NAME NOTE SIGNAL PIN NAME NOTE A0 A16 D0 D7 CE/OE/OE Address input Data output Chip Enable input or Output Enable input VCC GND 1 Power supply (2.6 V to 3.6 V) Ground NOTE:.
LH531000B-S Key Features
- 131,072 words × 8 bit organization
- Access time: 500 ns (MAX.)
- Power consumption: Operating: 64.8 mW (MAX.) Standby: 108 µW (MAX.)
- Mask-programmable control pin: Pin 20 = CE/OE/OE
- Static operation
- Three-state outputs
- Low power supply: 2.6 V to 3.6 V
- Package: 28-pin, 450-mil SOP
- A16 D0
- D7 CE/OE/OE