82S115 rom equivalent, 4096-bi1 bipolar rom.
* ORGANIZATION: 82S114 - 256 X 8 82S115 - 512 X 8
* ADDRESS ACCESS TIME - 60ns, MAXIMUM
* POWER DISSIPATION - 165pW/BIT, TYPICAL
* INPUT LOADING - (-100pA.
MICROPROGRAMMING HARDWIRE ALGORITHMS CHARACTER GENERATION CONTROL STORE SEQUENTIAL CONTROLLERS
PIN CONFIGURATION
IPACKA.
The 82S 114 and 82S 115 are Schottky-clamped Read Only Memories, incorporating on-chip data output registers. They are Field-Programmable, which means that custom patterns are immediately available by following the fusing procedure given in this data.
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