Download SI53311 Datasheet PDF
SI53311 page 2
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SI53311 Key Features

  • 6 differential or 12 LVCMOS outputs
  • Low output-output skew: <50 ps
  • Ultra-low additive jitter: 100 fs rms
  • Low propagation delay variation
  • Wide frequency range
  • Independent VDD and VDDO
  • Any-format input with pin selectable 1.8/2.5/3.3 V
  • Excellent power supply noise
  • 2:1 mux with hot-swappable inputs
  • Asynchronous output enable

SI53311 Description

The Si53311 is an ultra low jitter six output differential buffer with pin-selectable output clock signal format and divider selection.