Si53325
feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range from dc to 725/1250 MHz. Built-in LDOs deliver high PSRR performance and reduce the need for external ponents, simplifying low-jitter clock distribution in noisy environments.
The Si53320- 28 family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux. Other features include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance.
KEY FEATURES
- Ultra-low additive jitter: 50 fs rms
- Built-in LDOs for high PSRR performance
- Up to 10 LVPECL Outputs
- Any-format Inputs (LVPECL, Low-power
LVPECL, LVDS, CML, HCSL, LVCMOS)
- Wide frequency range: dc to 1250 MHz
- Output Enable option
- Multiple configuration options
- Dual Bank option
- 2:1 Input Mux operation
- Ro HS pliant, Pb-free
- Temperature range:
- 40 to...
