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Si53325 - Low-Jitter LVPECL Fanout Clock Buffers

Download the Si53325 datasheet PDF. This datasheet also covers the Si53320 variant, as both devices belong to the same low-jitter lvpecl fanout clock buffers family and are provided as variant models within a single manufacturer datasheet.

Description

2.

The Si53320-28 are a family of low-jitter, low-skew, fixed-format (LVPECL) buffers.

All devices except the Si53326 and Si53328 have a universal input that accepts most common differential or LVCMOS input signals.

Features

  • include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance. KEY.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (Si53320-SkyworksSolutions.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number Si53325
Manufacturer Skyworks Solutions
File Size 2.31 MB
Description Low-Jitter LVPECL Fanout Clock Buffers
Datasheet download datasheet Si53325 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
SI53325 Low-Jitter LVPECL Fanout Clock Buffers Silicon Laboratories
Si5332 Any-Frequency Clock Generator Skyworks
Si5332 6/8/12-Output Any-Frequency Clock Generator Silicon Laboratories
SI53320 Low-Jitter LVPECL Fanout Clock Buffers Silicon Laboratories
SI53321 Low-Jitter LVPECL Fanout Clock Buffers Silicon Laboratories

Other Datasheets by Skyworks Solutions

Part Number Description
Si53320 Low-Jitter LVPECL Fanout Clock Buffers
Si53321 Low-Jitter LVPECL Fanout Clock Buffers
Si53322 Low-Jitter LVPECL Fanout Clock Buffers
Si53323 Low-Jitter LVPECL Fanout Clock Buffers
Si53326 Low-Jitter LVPECL Fanout Clock Buffers

Full PDF Text Transcription

Click to expand full text
Si53320-28 Data Sheet Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz The Si53320–28 family of LVPECL fanout buffers is ideal for clock/data distribution and redundant clocking applications. These devices feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range from dc to 725/1250 MHz. Built-in LDOs deliver high PSRR performance and reduce the need for external components, simplifying low-jitter clock distribution in noisy environments. The Si53320–28 family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux. Other features include independent output enable and built-in format translation.
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