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CXD1947Q - IEEE1394 LINK Layer / PCI Bridge LSI

General Description

The block diagram shows the CXD1947Q and its connections in a host system.

The CXD1947Q attaches to the host via PCI bus.

PCI provides an inexpensive and moderatly high performance point for the connection of I/O devices.

Key Features

  • to support the transaction and bus management layers. The CXD1947Q includes a PCI bus interface and multiple DMA engines to enable high performance bus transfers. Features.
  • 1394 Link Layer/PCI Bridge Conforms to IEEE1394 high speed Serial Bus Supports 100Mb/s and 200Mb/s 1394 bus speeds Conforms to PCI version 2.1 specification Supports 6 independent programmable DMA channels.
  • Asynchronous transmit (1).
  • Asynchronous receive (1).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com PRELIMINARY IEEE1394 LINK Layer / PCI Bridge LSI Overview The CXD1947Q is a single-chip implementation of the link layer protocol of the 1394 Serial Bus, with additional features to support the transaction and bus management layers. The CXD1947Q includes a PCI bus interface and multiple DMA engines to enable high performance bus transfers. Features • • • • • 1394 Link Layer/PCI Bridge Conforms to IEEE1394 high speed Serial Bus Supports 100Mb/s and 200Mb/s 1394 bus speeds Conforms to PCI version 2.