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Supertex

DN3135 Datasheet Preview

DN3135 Datasheet

N-Channel Depletion-Mode Vertical DMOS FETs

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Supertex inc.
DN3135
N-Channel Depletion-Mode
Vertical DMOS FETs
Features
High input impedance
Low input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Applications
Normally-on switches
Solid state relays
Converters
Linear amplifiers
Constant current sources
Power supply circuits
Telecom
General Description
The Supertex DN3135 is a low threshold depletion-mode
(normally-on) transistor utilizing an advanced vertical
DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces a device
with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all
MOS structures, this device is free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Ordering Information
Part Number Package Option
Packing
DN3135K1-G TO-236AB (SOT-23) 3000/Reel
DN3135N8-G TO-243AA (SOT-89)
2000/Reel
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Product Summary
BVDSX/BVDGX
RDS(ON)
(max)
350V
35Ω
Pin Configuration
IDSS
(min)
180mA
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSX
BVDGX
±20V
Operating and storage
temperature
-55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Typical Thermal Resistance
Package
TO-236AB (SOT-23)
θja
203OC/W
TO-243AA (SOT-89)
133OC/W
DRAIN
DRAIN
SOURCE
GATE
TO-236AB (SOT-23)
SOURCE
DRAIN
GATE
TO-243AA (SOT-89)
Product Marking
N1SW
W = Code for week sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-236AB (SOT-23)
DN1SW
W = Code for week sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-243AA (SOT-89)
Doc.# DSFP-DN3135
C060413
Supertex inc.
www.supertex.com




Supertex

DN3135 Datasheet Preview

DN3135 Datasheet

N-Channel Depletion-Mode Vertical DMOS FETs

No Preview Available !

Thermal Characteristics
Package
ID
(continuous)
ID
(pulsed)
TO-236AB
72mA
300mA
TO-243AA
135mA
300mA
Notes:
MID o(cuonntetidnuoonuFs)Ri4s
limited
board,
2b5ymmmaxxr2a5temdmTxj.
1.57mm.
Power Dissipation
@TA = 25OC
0.36W
1.3W
IDR
72mA
135mA
DN3135
IDRM
300mA
300mA
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter
Min Typ Max
Units Conditions
BVDSX
VGS(OFF)
ΔVGS(OFF)
IGSS
Drain-to-source breakdown voltage
Gate-to-source off voltage
Change in VGS(OFF) with temperature
Gate body leakage current
ID(OFF) Drain-to-source leakage current
IDSS
RDS(ON)
Saturated drain-to-source current
Static drain-to-source on-state
resistance
350 - - V VGS = -5.0V, ID = 100µA
-1.5 - -3.5 V VDS = 15V, ID = 10µA
- - -4.5 mV/OC VDS = 15V, ID = 10µA
- - 100 nA VGS = ±20V, VDS = 0V
- - 1.0 µA VDS = Max rating, VGS = -5.0V
-
-
1.0
mA
VDS = 0.8 Max Rating,
VGS = -5.0V, TA = 125OC
180 -
- mA VGS = 0V, VDS = 15V
- - 35 Ω VGS = 0V, ID = 150mA
ΔRDS(ON) Change in RDS(ON) with temperature
- - 1.1 %/OC VGS = 0V, ID = 150mA
GFS Forward transconductance
140 -
- mmho VDS = 10V, ID = 100mA
CISS
COSS
CRSS
Input capacitance
Common source output capacitance
Reverse transfer capacitance
- 60 120
VGS = -5.0V,
- 6.0 15 pF VDS = 25V,
- 3.0 10
f = 1.0MHz
td(ON)
tr
td(OFF)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
-
-
-
-
-
-
10
15
15
VDD = 25V,
ns
ID = 150mA,
RGEN = 25Ω,
- - 20
VGS = 0v to -10V
VSD Diode forward voltage drop
- - 1.8 V VGS = -5.0V, ISD = 150mA
trr
Notes:
Reverse recovery time
- 800 -
ns VGS = -5.0V, ISD = 150mA
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
0V 90%
INPUT
10%
-10V
t(ON)
t(OFF)
td(ON)
tr
td(OFF)
tf
Pulse
Generator
RGEN
VDD
RL
OUTPUT
VDD
OUTPUT
0V
10%
90%
10%
90%
INPUT
D.U.T.
Doc.# DSFP-DN3135
C060413
Supertex inc.
2 www.supertex.com


Part Number DN3135
Description N-Channel Depletion-Mode Vertical DMOS FETs
Maker Supertex
Total Page 4 Pages
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