Vertical DMOS FET
►► Free from secondary breakdown
►► Low power drive requirement
►► Ease of paralleling
►► Low CISS and fast switching speeds
►► Excellent thermal stability
►► Integral source-drain diode
►► High input impedance and high gain
►► Motor controls
►► Power supply circuits
►► Drivers (relays, hammers, solenoids, lamps, memories,
displays, bipolar transistors, etc.)
This enhancement-mode (normally-off) transistor utilizes
a vertical DMOS structure and Supertex’s well-proven,
silicon-gate manufacturing process. This combination
produces a device with the power handling capabilities
of bipolar transistors and the high input impedance and
positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Absolute Maximum Ratings
Operating and storage temperature
-55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
Si VN YY = Year Sealed
4 0 1 2 L WW = Week Sealed
= “Green” Packaging
Typical Thermal Resistance
Package may or may not include the following marks: Si or