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Supertex

VP05E Datasheet Preview

VP05E Datasheet

P-Channel Enhancement-Mode Vertical DMOS FETs

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"§upertexinc.
VP05E
Ordering Information
BVoss '
BVOGS
-450V
-500V
ROS(ON)
(max)
1250
1250
P-Channel Enhancement-Mode
Vertical DMOS Power FETs
IO(ON)
(min)
100mA
100mA
T()'39
Order Number' Package
T()'92
VP0545N2
VP0545N3
VP0550N2
VP0550N3
DICE
VP0545ND
VP0550ND
Features
o Freedom from secondary breakdown
o Low power drive requirement
o Ease of paralleling
o Low C,ss and fast switching speeds
o Excellent thermal stability
o Integral Source-Drain diode
o High input impedance and high gain
o Complementary N- and P-Channel devices
Advanced DMOS Technology
These enhancement-mode (normally-off) power transistors util-
ize a vertical DMOS structure and Supertex's well-proven silicon-
gate manufacturing process. This combination produces devices
with the power handling capabilities of bipolar transistors and with
the high input impedance and negative temperature coefficient
inherent in MOS devices. Characteristic of all MOS structures,
these devices are free from thermal runaway and thermally-
induced secondary breakdown.
Supertex Vertical DMOS Power FETs are ideally suited to a wide
range of switching and amplifying applications where high break-
down voltage, high input impedance, low input capacitance, and
fast switching speeds are desired.
-.~,
Applications
o Motor control
o Convertors
o Amplifiers
o Switches
o Power supply circuits
o Driver (Relays, Hammers, Solenoids, Lamps,
Memories, Displays, Bipolar Transistors, etc.)
Package Options
(Notes 1 and 2)
i
TO-39
TO-92
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature'
*Oistance of 1.6 mm from case for 10 seconds.
±20V
-55°C to +150°C
300°C
9-35
Note 1: See Package Outline section for discrete pinouts.
Note 2: See Array section for quad pinouts.




Supertex

VP05E Datasheet Preview

VP05E Datasheet

P-Channel Enhancement-Mode Vertical DMOS FETs

No Preview Available !

Thermal Characteristics
Package 10 (continuous)'
10 (pulsed)'
TO-39
-125mA
TO-92
-70mA
,
10 (continuous) IS limited by max rated Tj'
-0.25A
-0.25A
Power Dissipation
@Tc=2SoC
3.5W
1W
9jC
°CIW
35
125
9'8
°CIW
125
170
IDR
-125mA
-70mA
VP05E
10RI"
-0.25A
-0.25A
Electrical Characteristics (@ 25°C unless otherwise specified)
(Notes 1 and 2)
Symbol
BVoss
VGSJlhl
aV GS(lIli
IGSS
loss
Parameter
Drain-to-Source
Breakdown Voltage
I VP0550
I VP0545
Gate Threshold Voltage
Change in VGS(Ih) with Temperature
Gate Body Leakage
Zero Gate Voltage Drain Current
Min
-500
-450
-2.5
Typ Max Unit
V
-4.5 V
-3.5 -6 mY/DC
-100 nA
-10
l-
-1000
ilA
10(ON)
ON-State Drain Current
-50
-100 -150
rnA
ROS(ON)
Static Drain-to-Source
ON-State Resistance
85
75 125
n
aROS(ON) Change in ROS(ON) with Temperature
0.85 "/%C
GFS
C,SS
Coss
CRSS
tdJON)
t,
tdOFF
~
Vso
trr
Forward Transconductance
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Diode Forward Voltage Drop
Reverse Recovery Time
25 40
35 60
10 20
3 10
5 10
8 15
8 15
5 10
-0.8 -1.5
200
mU
pF
ns
V
ns
Note 1: All D.C. parameters 100% tested at 25'C unless otherwise stated. (Pulse te.t: 300)1S pulse. 2% duty eyele.)
Note 2: All A.C. parameters sample tested.
Conditions
VGs =0,lo =-1mA
VGS = Vos' 10 = -1mA
VGS = Vos, 10 = -1mA
VGS = ±20V, Vos = 0
VGS = 0, Vos = Max Rating
VGS = 0, Vos = 0.8 Max Rating
TA = 125°C
VGS = -5V, Vos = -25V
VGs =-10V, Vos =-25V
VGS = -5V, 10 = -5mA
VGS = -10V, 10 = -10mA
VGs =-10V,10=-10mA
Ves = -25V. 10 = -10mA
VGS = 0, Vos = -25V
f = 1 MHz
Voo= -25V
10 = -10mA
. Rs=50n
VGS = 0, Iso = -0.1A
VG.=0,lso =-O.1A
Switching Waveforms and Test Circuit
Input 10%
t(ON)
Output - - - - - . . I
10%
t(OFF)
iI----pULSE---i
GENERATOR
1
I-~-OSCOPE
1
~~~--~~
D.U.T.
1
1
1
1
1
i ' " IL.. __________1
9-36


Part Number VP05E
Description P-Channel Enhancement-Mode Vertical DMOS FETs
Maker Supertex
Total Page 4 Pages
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