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TSC73M2910A - Microcontroller

Download the TSC73M2910A datasheet PDF. This datasheet also covers the TSC73M2910 variant, as both devices belong to the same microcontroller family and are provided as variant models within a single manufacturer datasheet.

General Description

The TSC 73M2910/2910A high performance microcontroller is based on the industry standard 8-bit 8032 implemented in TDK Semiconductor Corporation’s advanced submicron CMOS process.

Key Features

  • with the core CPU. The main feature is a user friendly HDLC Packetizer, accessed through the special function registers. It has a serial I/O, hardware support for 16 and 32-bit CRC, zero insert/delete control, a dedicated interrupt and a clear channel mode for by-passing the packetizer. Other features include additional user programmable I/O with programmable bank select and chip select logic, designed to eliminate board level glue logic. It also includes two general purpose input.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TSC73M2910-TDK.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by TDK Corporation

Part Number Description
TSC73M2910 Microcontroller

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TSC 73M2910/2910A Microcontroller DESCRIPTION The TSC 73M2910/2910A high performance microcontroller is based on the industry standard 8-bit 8032 implemented in TDK Semiconductor Corporation’s advanced submicron CMOS process. The processor has the same attributes of the 8032 including Instruction cycle time, UART, timers, interrupts, 256 bytes of on-chip RAM and programmable I/O. The architecture has been optimized for low power portable modem or communication applications by integrating unique features with the core CPU. The main feature is a user friendly HDLC Packetizer, accessed through the special function registers. It has a serial I/O, hardware support for 16 and 32-bit CRC, zero insert/delete control, a dedicated interrupt and a clear channel mode for by-passing the packetizer.