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THC63LVD824 - LVDS Receiver

Description

The THC63LVD824 receiver is designed to support Single Link transmission between Host and Flat Panel Display up to SXGA+ resolutions and Dual Link transmission between Host and Flat Panel Display up to UXGA resolutions.

Features

  • Wide dot clock range: 25-170MHz suited for VGA, SVGA.

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Datasheet Details

Part number THC63LVD824
Manufacturer THine Electronics
File Size 219.13 KB
Description LVDS Receiver
Datasheet download datasheet THC63LVD824 Datasheet

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Full PDF Text Transcription

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THC63LVD824 _Rev2.0 THC63LVD824 Single(135MHz)/Dual(170MHz) Link LVDS Receiver for XGA/SXGA/SXGA+/UXGA General Description The THC63LVD824 receiver is designed to support Single Link transmission between Host and Flat Panel Display up to SXGA+ resolutions and Dual Link transmission between Host and Flat Panel Display up to UXGA resolutions. The THC63LVD824 converts the LVDS data streams back into 48bits of CMOS/TTL data with falling edge or rising edge clock for convenient with a variety of LCD panel controllers. In Single Link, data transmit clock frequency of 135MHz, 48bits of RGB data are transmitted at an effective rate of 945Mbps per LVDS channel. Using a 135MHz clock, the data throughput is 472Mbytes per second.
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