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TC358765XBG - Mobile Peripheral

Download the TC358765XBG datasheet PDF. This datasheet also covers the TC358764XBG variant, as both devices belong to the same mobile peripheral family and are provided as variant models within a single manufacturer datasheet.

Features

  • DSI Receiver.
  • Configurable 1- up to 4-Data-Lane DSI Link with bi-directional support on Data Lane 0.
  • Maximum bit rate of 800 Mbps/lane.
  • Video input data formats: - RGB565 16 bits per pixel - RGB666 18 bits per pixel - RGB666 loosely packed 24 bits per pixel - RGB888 24 bits per pixel.
  • Video frame size: - Up to 1366×768 24-bit/pixel resolution to single-link LVDS display panel - Up to WUXGA resolutions (1920×1200 18-bit pixels) to dual-link LVDS display panel.
  • Supp.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC358764XBG-Toshiba.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Toshiba

Part Number Description
TC358762XBG Mobile Peripheral
TC358763XBG Mobile Peripheral
TC358764XBG Mobile Peripheral
TC358766XBG Mobile Peripheral
TC358767AXBG Mobile Peripheral

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC358764XBG/TC358765XBG CMOS Digital Integrated Circuit Silicon Monolithic TC358764XBG/TC358765XBG Mobile Peripheral Devices Overview TC358764XBG The primary function of TC358764XBG/TC358765XBG is DSI-to-LVDS Bridge, enabling video streaming output over DSI link to drive LVDS-compatible display panels. The chip supports up to 1366×768 24-bit pixel resolution for single-link LVDS and up to WUXGA (1920x1200 18-bit pixels) resolution for dual-link LVDS. As a secondary function, the chip also supports an I2C Master which is controlled by the DSI link; this may be used as an interface to any other control functions through I2C. The chip can be configured through the DSI link by sending write register commands through DSI Generic Long Write-packets.
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