• Part: TC358775XBG
  • Description: Mobile Peripheral
  • Manufacturer: Toshiba
  • Size: 391.76 KB
TC358775XBG Datasheet (PDF) Download
Toshiba
TC358775XBG

Key Features

  • DSI Receiver  Configurable 1- up to 4-Data-Lane DSI Link with bi-directional support on Data Lane 0  Maximum bit rate of 1 Gbps/lane  Video input data formats: - RGB565 16-bits per pixel - RGB666 18-bits per pixel - RGB666 loosely packed 24-bits per pixel - RGB888 24-bits per pixel  Video frame size: - Up to 1600×1200 24-bits per pixel resolution to single-link LVDS display panel, limited by 135 MHz LVDS speed - Up to WUXGA resolutions (1920×1200 24-bits pixels) to dual-link LVDS display panel, limited by 4 Gbps DSI link speed  Supports Video Stream packets for video data transmission.  Supports generic long packets for accessing the chip's register set  Supports the path for Host to control the on-chip I2C Master
  • LVDS FPD Link Transmitter  Supports single-link or dual-link  Maximum pixel clock frequency of 135 MHz.  Maximum pixel clock speed of 135 MHz for single- link or 270 MHz for dual-link  Supports display up to 1600×1200 24-bits per pixel resolution for single-link, or up to 1920×1200 24-bits resolutions for dual-link  Supports the following pixel formats: - RGB666 18-bits per pixel - RGB888 24-bits per pixel  Features Toshiba Magic Square algorithm which enables a RGB666 display panel to produce a display quality almost equivalent to that of an RGB888 24-bits panel  Flexible mapping of parallel data input bit ordering  Supports programmable clock polarity  Supports two power saving states - Sleep state, when receiving DSI ULPS signaling - Standby state, entered by STBY pin assertion
  • System Operation  Host configures the chip through DSI link  Through DSI link, Host accesses the chip register set using Generic Write and Read packets. One Generic Long Write packet can write to multiple contiguous register addresses  Includes an I2C Master function which is controlled by Host through DSI link (multi-master is not supported)  Power management features to save power  Configuration registers is also accessible through I2C Slave interface © 2014-2020 Toshiba Electronic Devices & Storage Corporation 1 / 24