TC9590XBG
CMOS Digital Integrated Circuit Silicon Monolithic
TC9590XBG
Automotive Peripheral Devices
TC9590XBG
Overview
TC9590XBG is a bridge device that converts HDMI® stream to MIPI®
CSI-2 SM TX.
The current and next generation Application Processors for
automotive have been designed without video streaming input port
except CSI-2 for Camcorder input.
P-LFBGA64-0707-0.80-002
Weight: 98 mg (Typ.)
TC9590XBG takes in HDMI input and converts to CSI-2 that looks like a Camcorder input.
Features
● HDMI-RX Interface
HDMI 1.4a
- Video Formats Support (Up to 1080P @60fps)
RGB, YCbCr444: 24-bpp @60fps
YCbCr422 24-bpp @60fps
- Audio Support
Internal Audio PLL to track N/CTS value
transmitted by the ACR packet.
- 3D Support
- Supports HDCP (optional)
- DDC Support
- EDID Support
Release A, Revision 1 (Feb 9, 2000)
First 128 byte (EDID 1.3 structure)
First E-EDID Extension: 128 bytes of CEA
Extension version 3 (specified in CEA-861-D)
Embedded 1K-byte SRAM (EDID_SRAM)
- Maximum HDMI clock speed: 165 MHz
Does not support Audio Return Path and HDMI
Ethernet Channels
● CSI-2 TX Interface
MIPI CSI-2 compliant (Version 1.01 Revision
0.04 – 2 April 2009)
Supports up to 1 Gbps per data lane
- Video, Audio and InfoFrame data can be
transmit over MIPI CSI-2
Supports up to 4 data lanes
● I2C Slave Interface
Supports for Normal-mode (100 kHz) and Fast-
mode (400 kHz)
Supports Ultra Fast-mode (2 MHz)
Configures all TC9590XBG internal registers
● Audio Output Interface
Either I2S or TDM Audio interface available
(pins are multiplexed)
I2S Audio Interface
Single data lane for stereo data
Supports Master Clock mode only
Supports 16, 18, 20 or 24-bit data (depend on
HDMI input stream)
Supports Left or Right-justify with MSB first
Supports 32 bit-wide time-slot only
Outputs Audio Oversampling clock (256fs)
TDM (Time Division Multiplexed) Audio Interface
Fixed to 8 channels (depend on HDMI input
stream)
Supports 32 bit-wide time slot only
Supports Master Clock mode only
Supports 16, 18, 20 or 24-bit PCM audio data
word (depend on HDMI input stream)
Outputs Audio Oversampling clock (256fs)
● InfraRed (IR)
Supports NEC Infrared protocol
● System
Internal core has two power domains (VDDC1
and VDDC2)
- VDDC1 is always on power domain
- VDDC2 can be shut-off during deep sleep mode
● Power supply inputs
Core and MIPI D-PHY: 1.2 V
I/O: 1.8V or 3.3 V
HDMI: 3.3 V
APLL: 2.5 V
● Power Consumption during typical operations
720P @30fps: 0.48 W
1080P @30fps: 0.48 W
1080P @60fps: 0.54 W
© 2014-2020
Toshiba Electronic Devices & Storage Corporation
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2020-06-05
Rev. 1.0
