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TH58TEG8DCJTA20 Datasheet Nand Memory Toggle Ddr1.0

Manufacturer: Toshiba

Overview: TOSHIBA CONFIDENTIAL Tx58TEGxDCJTAx0 TOSHIBA NAND memory Toggle DDR1.0 Technical Data Sheet Rev. 0.3 2012 – 04 – 10 TOSHIBA Semiconductor & Storage Products Memory Division TC58TEG6DCJTA00 / TC58TEG6DCJTAI0 TH58TEG7DCJTA20 / TH58TEG7DCJTAK0 TH58TEG8DCJTA20 / TH58TEG8DCJTAK0 0 TENTATIVE 2012-04-10C 1. INTRODUCTION TOSHIBA CONFIDENTIAL Tx58TEGxDCJTAx0 1.1.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

Toggle DDR is a NAND interface for high performance applications which support data read and write operations using bidirectional DQS.

Toggle DDR NAND has implemented ’Double Data Rate’ without a clock.

It is patible with functions and mand which have been supported in conventional type NAND(i.e.

Key Features

  • Organization Table 1 Product Organization Parameter Part number (TOPER: 0~70℃) Part number (TOPER: -40~85℃) Device capacity Page size Block size Plane size Plane per one LUN LUN per one target Target per one device Number of valid blocks per a device (min) Number of valid blocks per a device (max) TC58TEG6DCJ TC58TEG6DCJTA00 TC58TEG6DCJTAI0 17664×256×2092×8 bits 17664 Bytes (4M + 320 K) Bytes 9459990528Bytes 1 Planes 1 LUNs 1 target 2018 2092 TH58TEG7DCJ TH58TEG7DCJTA20 TH58TEG7DCJTAK0 17664×.

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