Datasheet4U Logo Datasheet4U.com

WED3EG7232S-JD3 - 256MB - 32Mx72 DDR SDRAM UNBUFFERED

Description

The WED3EG7232S is a 32Mx72 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components.

The module consists of nine 32Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate.

Synchronous design allows precise cycle control with the use of system clock.

Features

  • Double-data-rate architecture DDR200, DDR266, DDR333 amd DDR400.
  • JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2, 2.5 (clock) Programmable Burst Length (2, 4, 8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input. Auto and self refresh Serial presence detect Power supply:.
  • VCC = VCCQ = +2.5V ± 0.2V (100, 133 and 166MHz).
  • VCC = VCCQ = +2.6V ±.

📥 Download Datasheet

Datasheet Details

Part number WED3EG7232S-JD3
Manufacturer White Electronic Designs
File Size 229.82 KB
Description 256MB - 32Mx72 DDR SDRAM UNBUFFERED
Datasheet download datasheet WED3EG7232S-JD3 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
WED3C755E8M-XBX RISC MICROPROCESSOR MULTI-CHIP PACKAGE White Electronic Designs Corporation
WED3DG64126V-D2 1GB - 128M X 64 SDRAM Unbuffered White Electronic Designs Corporation
WED3DG64128V-D1 1GB - 128M X 64 SDRAM Unbuffered White Electronic Designs Corporation
WED3DG6419V-D2 128MB - 16Mx64 SDRAM UNBUFFERED White Electronic Designs Corporation
WED3DG6466V-D2 SDRAM UNBUFFERED White Electronic Designs Corporation

Other Datasheets by White Electronic Designs

Part Number Description
WED3EG7233S-D3 256MB - 2x16Mx72 DDR SDRAM UNBUFFERED
WED3EG7233S-JD3 256MB - 2x16Mx72 DDR SDRAM UNBUFFERED
WED3EG7218S-JD3 128MB - 16Mx72 DDR SDRAM UNBUFFERED
WED3EG6417S-D4 128MB - 16Mx64 DDR SDRAM UNBUFFERED
WED3EG6418S-D4 128MB- 16Mx64 DDR SDRAM UNBUFFERED

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.datasheet4u.com WED3EG7232S-JD3 PRELIMINARY 256MB – 32Mx72 DDR SDRAM UNBUFFERED FEATURES Double-data-rate architecture DDR200, DDR266, DDR333 amd DDR400 • JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2, 2.5 (clock) Programmable Burst Length (2, 4, 8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input. Auto and self refresh Serial presence detect Power supply: • VCC = VCCQ = +2.5V ± 0.2V (100, 133 and 166MHz) • VCC = VCCQ = +2.6V ± 0.1V (200MHz) JEDEC 184 pin DIMM package • JD3 PCB height: 30.48 (1.
Published: |