WED3EG7233S-JD3 datasheet, unbuffered equivalent, White Electronic Designs

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Features and benefits

Double-data-rate architecture DDR200 and DDR266
* JEDEC design speciﬁed Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Laten.

Application

OPERATING FREQUENCIES DDR266 @CL=2 Clock Speed CL-tRCD-tRP 133MHz 2-2-2 DDR266 @CL=2.5 133MHz 2.5-3-3 DDR200 @CL=2 100.

Description

The WED3EG7233S is a 2x16Mx72 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component. The module consists of eighteen 16Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycl.

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