2m x 16 bit x 4 banks sdram.
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* 3.3V±0.3V power supply Up to 133 MHz clock frequency 2,097,152 words x 4 banks x 16 bits org.
Key Parameters
Symbol tCK tAC tRP tRCD ICC1 ICC4 ICC6 Description Clock Cycle Time Access Time from CLK Precharge to A.
W981216AH is a high speed synchronous dynamic random access memory (SDRAM) , organized as 2M words x 4 banks x 16 bits. Using pipelined architecture and 0.20um process technology, W981216AH delivers a data bandwidth of up to 266M bytes per second (-7.
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