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XC2S50E Datasheet - Xilinx

XC2S50E Spartan-IIE FPGA

DS077-2 (v3.0) August 9, 2013 * Architectural Description - Spartan-IIE Array - Input/Output Block - Configurable Logic Block - Block RAM - Clock Distribution: Delay-Locked Loop - Boundary Scan * Development System * Configuration Module 3: DC and Switching Characteristics D.

XC2S50E Datasheet (4.31 MB)

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Datasheet Details

Part number:

XC2S50E

Manufacturer:

Xilinx

File Size:

4.31 MB

Description:

Spartan-iie fpga.

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TAGS

XC2S50E Spartan-IIE FPGA Xilinx

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