CLA200 - CMOS Gate Arrays

Zarlink Semiconductor

Datasheet Details

Part number	CLA200
Manufacturer	Zarlink Semiconductor
File Size	197.43 KB
Description	CMOS Gate Arrays
Datasheet	CLA200_ZarlinkSemiconductor.pdf

0.35µm drawn Channel Length Three (CLT) and Four (CLQ) layer metal options Automated base array constructor for optimised arrays with up to 3 million gates Low Power, 0.4µ W/MHz/Gate at 3V (2-input NAND with two loads) 135ps gate delay for 2-input NAND with two loads (3V) High density staggered pad ring Wide range of package options including QFP & BGA Characterised for operation from 1.

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Published: Apr 24, 2006 |