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Zarlink Semiconductor

PDSP16488AMA Datasheet Preview

PDSP16488AMA Datasheet

Single Chip 2D Convolver

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PDSP16488A MA
PDSP16488A MA
Single Chip 2D Convolver with Integral Line Delays
Supersedes January 1997 version, DS3742 - 3.1
DS3742 - 5.0 November 2000
The PDSP16488A is a fully integrated, application spe-
cific, image processing device. It performs a two dimensional
convolution between the pixels within a video window and a
set of stored coefficients. An internal multiplier accumulator
array can be multi-cycled at double or quadruple the pixel
clock rate. This then gives the window size options listed in
Table 1.
An internal 32k bit RAM can be configured to provide
either four or eight line delays. The length of each delay can
be programmed to the users requirement, up to a maximum of
1024 pixels per line. The line delays are arranged in two
groups,which may be internally connected in series or may be
configured to accept separate pixel inputs. This allows inter-
laced video or frame to frame operations to be supported.
The 8 bit coefficients are also stored internally and can
be downloaded from a host computer or from an EPROM. No
additional logic is required to support the EPROM and a single
device can support up to 16 convolvers.
The PDSP16488A contains an expansion adder and
delay network which allows several devices to be cascaded.
Convolvers with larger windows can then be fabricated as
shown in Table 2.
Intermediate 32 bit precision is provided to avoid any
danger of overflow, but the final result will not normally occupy
all bits. The PDSP16488A thus provides a multiplier in the
output path, which allows the user to align the result to the
most significant end of the 32 bit word.
Data Window Size Max Pixel Line
Size Width X Depth
Rate Delays
84
88
88
16 4
16 8
4 40MHz 4x1024
4 20MHz 4x1024
8 10MHz 8x512
4 20MHz 4x512
4 10MHz 4x512
Table 1 Single Device Configurations
Max Pixel Pixel
Window size
Rate
Size 3x3 5x5 7x7 9x9 11x11 15x15 23x23
10MHz
8 11 1444
9
10MHz 16 1 2 2 - - - -
20MHz
8 12 2668
-
20MHz 16 1 4 4 - - - -
40MHz 8 1 4 * 4 * - - - -
40MHz 16 2 - - - - - -
* Maximum rate is limited to 30 MHz by line store expansion delays
Table 2 Devices needed to implement typical window sizes
FEATURES
I The PDSP16488A is a fully compatible replacement
for the PDSP16488
I 8 or 16 bit pixels with rates up to 40 MHz
I Window sizes up to 8 x 8 with a single device
I Eight internal line delays
I Supports interlace and frame to frame operations
I Coefficients supplied from an EPROM or remote host
I Expandable in both X and Y for larger windows
I Gain control and pixel output manipulation
I 132 pin QFP
Rev
Date
AB C
MAR 1993 JUL 1996 JAN1997
D
NOTE
Polyimide is used as an inter-layer dielectric and as
glassivation.
Polymeric material is also used for die attach which according
to the requirement in paragraph 1.2.1.b. (2) precludes
catagorising this device as fully compliant. In every other
respect this device has been manufactured and screened in full
accordance with the requirements of Mil-Std 883 (latest revi-
sion).
CHANGE NOTIFICATION
The change notification requirements of MIL-PRF-38535 will
be implemented on this device type. Known customers will be
notified of any changes since the last buy when ordering further
parts if significant changes have been made.
PIXEL
CLOCK
GENERATOR
SYNC
EXTRACT
A/D
CONVERTER
COMPOSITE
OPTIONAL
FIELD
STORE
EPROM
ADDR DATA
POWER ON
RESET
CLK
SYNC
BYPASS
RES
PDSP
DATA
IN
16488A
CONVOLVER
DELAYED
SYNC
OUTPUT
DATA
AUX
DATA
Fig. 1 Typical , Stand Alone, Real Time System
1




Zarlink Semiconductor

PDSP16488AMA Datasheet Preview

PDSP16488AMA Datasheet

Single Chip 2D Convolver

No Preview Available !

PDSP16488A MA
CE DS R/W PC0 PC1 RSE CS3:0
MULTI PURPOSE
DATA BUS
X15:0
PROG
MASTER
SINGLE
DELOP
IP7:0
BY
PASS
L7:0
CONTROL
X
DELAY
Y
DELAY
1
LINE
DELAY
Y
DELAY
3
LINE
DLYS
4
LINE
DLYS
COEFFICIENT
STORE (64)
8X8
ARRAY OF
MAC'S
CONTROL
REGISTERS
COMPARATOR
CLOCK
Fig. 2 Functional Block Diagram
BIN
OVER
FLOW
D15:0
DATA
OUT
OEN
PIN NO
AC PACKAGE
FUNCTION
A1 L0
B1 F1
C2 L1
C1 L2
D2 L3
D1 SPARE
E2 L4
E1 L5
F2 L6
G2 L7
G1 IP7
H2 SPARE
J1 IP6
J2 IP5
K1 IP4
K2 SPARE
L1 IP3
L2 IP2
M1 IP1
N1 IP0
N2 BYPASS
2
PIN NO
AC PACKAGE
M3
N3
M4
N4
M5
N5
M6
M7
N7
M8
N9
M9
N10
M10
N11
M11
N12
N13
M13
L12
L13
FUNCTION
X15
X14
X13
SPARE
SINGLE
X12
X11
MASTER
X10
X9
X8
X7
X6
X5
X4
X3
X2
X1
X0
DELOP
PC0
PIN NO
AC PACKAGE
K12
K13
J12
J13
H12
G12
G13
F12
E13
E12
D13
D12
C13
C12
B13
A13
A12
B11
A11
B10
A10
FUNCTION
RES
CS0
CS1
CS2
CS3
PROG
DS
CE
R/W
HRES
OV
PC1
BIN
OEN
D0
D1
D2
D3
D4
D5
D6
Pin out Table (84 pin PGA - AC84)
PIN NO
AC PACKAGE
FUNCTION
B9 D7
A9 D8
B8 CLK
B7 SPARE
A7 D9
B6 D10
A5 D11
B5 SPARE
A4 D12
B4 D13
A3 D14
B3 D15
A2 F0
F1 VDD
N6 VDD
F13 VDD
A6 VDD
H1 GND
N8 GND
H13 GND
A8 GND


Part Number PDSP16488AMA
Description Single Chip 2D Convolver
Maker Zarlink Semiconductor
Total Page 30 Pages
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